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FDS_6533_6534_004
71M6533/G/H and 71M6534/H Data Sheet
SLOT0_ALTSEL
[3:0]
SLOT1_ALTSEL
[3:0]
SLOT2_ALTSEL
[3:0]
…
SLOT8_ALTSEL
[3:0]
SLOT9_ALTSEL
[3:0]
SP_ADDR[15:8]
SP_ADDR[7:0]
SP_CMD
SPE
SPI_FLAG
SUBSEC[7:0]
2096[3:0]
2096[7:4]
2097[3:0]
…
209A[3:0]
209A[7:4]
2072[7:0]
2073[7:0]
2071
2070[7]
20B1[4]
2014[7:0]
10
1
11
…
8
9
–
–
0
–
10
1
11
…
8
9
–
–
0
–
R/W
R
R
R
R/W
R/W
R
Alternate multiplexer frame analog input selection. Maps the selected input, 0-11, to
the multiplexer state.
The additional inputs, 10 and 11 in the alternate frame are:
10 = TEMP
11 = VBAT
SPI Address. 16-bit address from the bus master.
SPI command. 8-bit command from the bus master.
SPI port enable. Enables the SPI interface on pins SEG3 through SEG6.
SPI interrupt flag. The flag is set by the hardware and is cleared by the firmware
writing a 0. Firmware using this interrupt should clear the spurious interrupt indication
during initialization.
The remaining count, in terms of 1/256 RTC cycles, to the next one second boundary.
SUBSEC may be read by the MPU after the one second interrupt and before reaching
the next one second boundary. Setting RST_SUBSEC will clear SUBSEC .
SUM_CYCLES[5:0] 2001[5:0]
0
0
R/W
The number of pre-summer outputs summed in the final summer.
TMUX[4:0]
TRIM[7:0]
20AA[4:0]
20FF
2
0
–
0
R/W
R/W
Contains TRIMT[7:0], TRIMBGA , TRIMBGB or TRIMM[2:0] depending on the value
written to TRIMSEL[3:0] . If TRIMBGB = 0, the device is a 71M6533/71M6534, else it is
a 71M6533H/71M6534H.
Selects the temperature trim fuse to be read with the TRIM register:
TRIMSEL[3:0]
20FD[3:0]
0
0
R/W
TRIMSEL[3:0]
1
4
5
6
Trim Fuse
TRIMT[7:0]
TRIMM[2:0]
TRIMBGA
TRIMBGB
Purpose
Trim for the magnitude of VREF
Trim values related to temperature
compensation
UMUX_E ?
UMUX_SEL ?
200F[7]
S00F[6]
0
0
0
0
R/W
R/W
Enables the optical UART multiplexer, selects the alternate function (MTX, MRX) for
DIO18, DIO22.
When UMUX_E = 1, selects between OPT_TX, OPT_RX and MTX, MRX as the optical
UART I/O pins. 0 = OPT_TX, OPT_RX, 1 = MTX, MRX
Rev 2
93
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